In recent years, a high-integration technique of a semiconductor device has been developed. In the recent high-integration technique of a semiconductor device, an integration technique of a micro electro mechanical system (MEMS) has been required together with the integration technique of a large scale integration (LSI).
The MEMS (Micro Electro Mechanical System) is an electromechanical element having a microstructure manufactured by using a silicon microfabrication process. The MEMS has been expected to be applied in a wide range of electronic product such as a pressure sensor, an acceleration sensor, or RF filter. As one of the techniques for integrating the MEMS and LSI, there is a high-density three-dimensional packaging technology in which each of LSIs and MEMSs is stacked. However, in this technology, a through-hole in the vertical direction has to be formed on the LSI and MEMS, which results an increased processing cost. Therefore, a technique for a high integration on the same plane with reduced cost without forming the through-hole has been desired.
There are two representative systems, which are SOC (System on Chip) and SIP (System in Package) as methods for the high integration on the same plane. The SOC is a process for the integration by forming plural devices on one chip. The SOC can increase the integration of the device. However, there is limitation on the type of the device that can be integrated. For example, it is difficult to form a device made of another crystal system such as GaAs on a Si substrate, because of a difference in process. Further, a period needed for a design in order to realize a new SOC is long, which results in increased cost of development.
In contrast with the SOC, in the SIP, each LSI chip is independently formed, and then, each of them is independently mounted on an integrated substrate. In the SIP, each chip can independently be formed, so that there is no limitation on the chip to be integrated. Even when a new system is realized, an existing chip can be utilized. Therefore, a period for the design can be shortened, which provides an advantage of reducing cost of development. However, the integrated density of the chip depends upon the circuit board on which each chip is mounted. Therefore, it is difficult to arrange the chips with high density, compared to the SOC.